تبلیغات
پایان نامه و تز
پایان نامه و تز
.::فروش پایان نامه و تز لاتین::.

این مجموعه بیش از 800 پایان نامه و تز در مورد  VLSI  است .

این مجموعه آخرین پایان نامه های کار شده تا سال 2011 است.

برای خرید این مجموعه بصورت تکی یا کلی به قیمتی مناسب و گرفتن اطلاعات بیشتر با من تماس بگیرید.

در ادامه میتوانید عنوان پایان نامه ها و تزهای کار شده در زمینه

VLSI 

را مشاهده کنید.
301.
Evolutionary techniques for multi-objective VLSI netlist partitioning
by Al-Abaji, Raslan Hashim, M.S., King Fahd University of Petroleum and Minerals (Saudi Arabia), 2002, 117 pages; AAT 1411247
Preview (502 K) ***  Full Text - PDF (4 MB)  
**************************************************
302.
Fast and efficient modeling methods for substrate coupling in VLSI circuits
by Masoumi, Nasser, Ph.D., University of Waterloo (Canada), 2002, 216 pages; AAT NQ70858
Preview (572 K) ***  Full Text - PDF (9 MB)  
**************************************************
303.
Fundamental algorithms for physical design planning of VLSI
by Tang, Xiaoping, Ph.D., The University of Texas at Austin, 2002, 167 pages; AAT 3086713
Preview (165 K) ***  Full Text - PDF (860 K)  
**************************************************
304.
Implementation of iterative decoding algorithms on digital VLSI platforms
by Zarkeshvari, Farhad, M.Eng., Carleton University (Canada), 2002, 121 pages; AAT MQ79773
Preview (852 K) ***  Full Text - PDF (5 MB)  
**************************************************
305.
Layout optimization and planning in deep sub-micron VLSI designs
by Chang, Chin-Chih, Ph.D., University of California, Los Angeles, 2002, 142 pages; AAT 3059595
Preview (444 K) ***  Full Text - PDF (5 MB)  
**************************************************
306.
Low-power VLSI design
by Conflitti, Danny, M.A.Sc., University of Windsor (Canada), 2002, 150 pages; AAT MQ75780
Preview (580 K) ***  Full Text - PDF (8 MB)  
**************************************************
307.
Measuring optical flow using analog VLSI
by Xing, Nianwei, M.A.Sc., Dalhousie University (Canada), 2002, 93 pages; AAT MQ63569
Preview (637 K) ***  Full Text - PDF (3 MB)  
**************************************************
308.
Methodologies for predictability optimization in VLSI systems
by Srivastava, Ankur, Ph.D., University of California, Los Angeles, 2002, 110 pages; AAT 3069672
Preview (413 K) ***  Full Text - PDF (4 MB)  
**************************************************
309.
Microarchitecture for billion-transistor VLSI superscalar processors
by Loh, Gabriel Hsiuwei, Ph.D., Yale University, 2002, 255 pages; AAT 3068313
Preview (675 K) ***  Full Text - PDF (10 MB)  
**************************************************
310.
New algorithms for physical design of VLSI circuits
by Lai, Minghorng, Ph.D., The University of Texas at Austin, 2002, 110 pages; AAT 3099471
Preview (272 K) ***  Full Text - PDF (882 K)  
**************************************************
311.
Noise analysis and optimization in mixed-signal VLSI circuits
by Heydari, Payam, Ph.D., University of Southern California, 2002, 142 pages; AAT 3073790
Preview (635 K) ***  Full Text - PDF (5 MB)  
**************************************************
312.
Optimization techniques for the next generation of VLSI test
by Huang, Yu, Ph.D., The University of Iowa, 2002, 192 pages; AAT 3050813
Preview (644 K) ***  Full Text - PDF (7 MB)  
**************************************************
313.
Optoelectronic-VLSI system integration for digital information processing
by Hong, Sunkwang, Ph.D., University of Southern California, 2002, 131 pages; AAT 3093771
Preview (744 K) ***  Full Text - PDF (8 MB)  
**************************************************
314.
Precision CMOS receivers for VLSI testing applications
by Weinlader, Daniel Keith, Ph.D., Stanford University, 2002, 110 pages; AAT 3038170
Preview (604 K) ***  Full Text - PDF (4 MB)  
**************************************************
315.
Reduced complexity VLSI implementation of discrete wavelet transform for image and video compression
by Dang, Philip Phuc, Ph.D., University of California, San Diego, 2002, 345 pages; AAT 3081063
Preview (647 K) ***  Full Text - PDF (9 MB)  
**************************************************
316.
Steiner tree and interconnect optimization in VLSI design
by Zhao, Jiang, M.A.Sc., University of Windsor (Canada), 2002, 83 pages; AAT MQ75857
Preview (361 K) ***  Full Text - PDF (2 MB)  
**************************************************
317.
VLSI implementation of a 2/3 Viterbi decoder and noise effects in digital ICs
by Zhao, Youxiong, M.A.Sc., Carleton University (Canada), 2002, 131 pages; AAT MQ68318
Preview (556 K) ***  Full Text - PDF (4 MB)  
**************************************************
318.
VLSI performance estimation of IP blocks for multicarrier systems-on-a-chip
by Pagiamtzis, Kostas, M.A.Sc., University of Toronto (Canada), 2002, 100 pages; AAT MQ68731
Preview (359 K) ***  Full Text - PDF (3 MB)  
**************************************************
319.
Adaptive VLSI for active optics and imaging
by Cohen, Marc Harry, Ph.D., The Johns Hopkins University, 2001, 116 pages; AAT 3006218
Preview (766 K) ***  Full Text - PDF (4 MB)  
**************************************************
320.
A mixed-signal CMOS VLSI image convolution circuit using error spectrum shaping
by Buchanan, Brent Edgar, Ph.D., Georgia Institute of Technology, 2001, 161 pages; AAT 3015640
Preview (531 K) ***  Full Text - PDF (5 MB)  
**************************************************
321.
Analog computation and learning in VLSI
by Koosh, Vincent Frank, Ph.D., California Institute of Technology, 2001, 103 pages; AAT 3015089
Preview (589 K) ***  Full Text - PDF (3 MB)  
**************************************************
322.
Analysis and design of power and ground networks for VLSI circuits
by Kozhaya, Joseph Nicolas, Ph.D., University of Illinois at Urbana-Champaign, 2001, 107 pages; AAT 3030448
Preview (643 K) ***  Full Text - PDF (4 MB)  
**************************************************
323.
An assessment of VLSI and embedded software implementations for Reed-Solomon decoders
by Fill, Ted Stanley, M.A.Sc., University of Toronto (Canada), 2001, 122 pages; AAT MQ63016
Preview (472 K) ***  Full Text - PDF (6 MB)  
**************************************************
324.
An optoelectronic-VLSI chip with forward error correction to improve the reliability of parallel optical data links
by Faucher, Julien, M.Eng., McGill University (Canada), 2001, 79 pages; AAT MQ75267
Preview (569 K) ***  Full Text - PDF (3 MB)  
**************************************************
325.
A VLSI computational sensor for the detection of image features
by Nishimura, Masatoshi, Ph.D., University of Pennsylvania, 2001, 210 pages; AAT 3003669
Preview (579 K) ***  Full Text - PDF (7 MB)  
**************************************************
326.
A VLSI implementation of an adaptive-effort low-power Viterbi decoder for wireless communications
by Allan, Gordon John, M.Sc.(Eng), Queen's University at Kingston (Canada), 2001, 105 pages; AAT MQ63264
Preview (714 K) ***  Full Text - PDF (4 MB)  
**************************************************
327.
Butterfly search velocity estimation: Analysis and VLSI implementation issues
by McAleavey, Stephen Andrew, Ph.D., The University of Rochester, 2001, 149 pages; AAT 3035609
Preview (494 K) ***  Full Text - PDF (5 MB)  
**************************************************
328.
CLKOPT: Zero-skew targeted clock network optimization for synchronous systems in standard cell VLSI
by Boros, Aaron Jason, M.E., The Cooper Union for the Advancement of Science and Art, 2001, 92 pages; AAT 1403675
Preview (886 K) ***  Full Text - PDF (5 MB)  
**************************************************
329.
Consistency-enhanced anisotropic diffusion in analog VLSI
by Gulino, Fabio Giorgio, M.A.Sc., Dalhousie University (Canada), 2001, 96 pages; AAT MQ63520
Preview (563 K) ***  Full Text - PDF (2 MB)  
**************************************************
330.
Design and implementation of optoelectronic-VLSI chips for short-reach optical interconnects
by Laprise, Emmanuelle, M.Eng., McGill University (Canada), 2001, 119 pages; AAT MQ75273
Preview (823 K) ***  Full Text - PDF (6 MB) 
**************************************************
331.
Exploring CadenceRTM EDA tools for VLSI design
by Semig, Peter L., Jr., M.S., Michigan State University, 2001, 57 pages; AAT 1405990
Preview (182 K) ***  Full Text - PDF (2 MB)  
**************************************************
332.
Extending the reach of self-test approaches in VLSI
by Bayraktaroglu, Ismet, Ph.D., University of California, San Diego, 2001, 168 pages; AAT 3029651
Preview (722 K) ***  Full Text - PDF (7 MB)  
**************************************************
333.
High performance, high speed VLSI architectures for wireless communication applications
by Chi, Zhipei, Ph.D., University of Minnesota, 2001, 175 pages; AAT 3010541
Preview (474 K) ***  Full Text - PDF (5 MB)  
**************************************************
334.
High performance CMOS VLSI circuit design with CVTL
by Kuo, Ko-Chi, Ph.D., State University of New York at Stony Brook, 2001, 134 pages; AAT 3024866
Preview (466 K) ***  Full Text - PDF (4 MB)  
**************************************************
335.
Integrated logic and physical design for deep submicron VLSI optimization
by Chen, Wei, Ph.D., University of Southern California, 2001, 148 pages; AAT 3054719
Preview (502 K) ***  Full Text - PDF (4 MB)  
**************************************************
336.
Iterative algorithms for timing and low-power driven VLSI standard-cell placement
by Minhas, Mahmood-ur-Rehman, M.S., King Fahd University of Petroleum and Minerals (Saudi Arabia), 2001, 107 pages; AAT 1404202
Preview (448 K) ***  Full Text - PDF (3 MB)  
**************************************************
337.
Neuromorphic VLSI circuits for an electronic nose chip
by Tang, Kea-Tiong, Ph.D., California Institute of Technology, 2001, 124 pages; AAT 3011586
Preview (692 K) ***  Full Text - PDF (5 MB)  
**************************************************
338.
New convex relaxations for the maximum cut and VLSI layout problems
by Ferreira Fialho dos Anjos, Miguel Nuno, Ph.D., University of Waterloo (Canada), 2001, 220 pages; AAT NQ85334
Preview (797 K) ***  Full Text - PDF (8 MB)  
**************************************************
339.
Performance-driven, low-power, standard VLSI cell placement using simulated evolution
by Khan, Junaid Asim, M.S., King Fahd University of Petroleum and Minerals (Saudi Arabia), 2001, 121 pages; AAT 1402844
Preview (525 K) ***  Full Text - PDF (4 MB)  
**************************************************
340.
Power analysis and optimization in VLSI circuits and systems
by Wu, Qing, Ph.D., University of Southern California, 2001, 225 pages; AAT 3065863
Preview (524 K) ***  Full Text - PDF (6 MB)  
**************************************************
341.
Power supply noise analysis for deep sub-micron (DSM) VLSI circuits
by Zhao, Shiyou, Ph.D., Purdue University, 2001, 113 pages; AAT 3075745
Preview (464 K) ***  Full Text - PDF (5 MB)  
**************************************************
342.
Reliable low-power solution for high-performance VLSI circuit design
by Kim, Ki-Wook, Ph.D., University of Illinois at Urbana-Champaign, 2001, 136 pages; AAT 9996646
Preview (686 K) ***  Full Text - PDF (6 MB)  
**************************************************
343.
Several problems in VLSI physical design automation
by Lu, Bing, Ph.D., University of Minnesota, 2001, 87 pages; AAT 3002807
Preview (505 K) ***  Full Text - PDF (3 MB)  
**************************************************
344.
Statistical modeling of fault coverage and optimizations in VLSI testing
by Cui, Hailong, Ph.D., The University of Nebraska - Lincoln, 2001, 136 pages; AAT 3034373
Preview (557 K) ***  Full Text - PDF (4 MB)  
**************************************************
345.
True single-phase adiabatic circuitry for high-performance, low-energy VLSI
by Kim, Suhwan, Ph.D., University of Michigan, 2001, 106 pages; AAT 3000978
Preview (677 K) ***  Full Text - PDF (4 MB)  
**************************************************
346.
VLSI interconnect performance optimization and planning
by Hu, Jiang, Ph.D., University of Minnesota, 2001, 151 pages; AAT 9994512
Preview (494 K) ***  Full Text - PDF (6 MB)  
**************************************************
347.
VLSI optimization of size-independent, constant-time up/down counters
by Deshmukh, Srinivasarao, M.S., Texas A&M University - Kingsville, 2001, 57 pages; AAT 1404779
Preview (239 K) ***  Full Text - PDF (2 MB)  
**************************************************
348.
VLSI technology for efficient and dynamic power management, delivery, and utilization
by McShane, Erik Andrew, Ph.D., University of Illinois at Chicago, 2001, 279 pages; AAT 3364652
› 153 references
Preview (279 K) ***  Full Text - PDF (3 MB)  
**************************************************
349.
A CAD tool for clock distribution in high-speed VLSI designs
by Kim, Haksu, Ph.D., The University of North Carolina at Charlotte, 2000, 91 pages; AAT 9960714
Preview (545 K) ***  Full Text - PDF (3 MB)  
**************************************************
350.
Accurate gate delay evaluation of CMOS deep sub-micron VLSI circuits
by Chen, Xian Hong, Ph.D., University of Colorado at Colorado Springs, 2000, 184 pages; AAT 9999342
Preview (647 K) ***  Full Text - PDF (6 MB)  
**************************************************
351.
Algorithms for interconnect planning and optimization in deep-submicron VLSI design
by Liu, I-Min, Ph.D., The University of Texas at Austin, 2000, 114 pages; AAT 9992853
Preview (399 K) ***  Full Text - PDF (3 MB)  
**************************************************
352.
Algorithms for efficient extraction of faults in large VLSI circuits
by Zachariah, Sujit Thomas, Ph.D., State University of New York at Buffalo, 2000, 91 pages; AAT 9987124
Preview (508 K) ***  Full Text - PDF (3 MB)  
**************************************************
353.
Analog VLSI decoding for digital communications and high-performance data conversion
by He, Kai, Ph.D., The Johns Hopkins University, 2000, 86 pages; AAT 9964106
Preview (534 K) ***  Full Text - PDF (3 MB)  
**************************************************
354.
An analog VLSI implementation of a continuous-time recurrent neural network
by Brown, Bruce Erwin, M.S.E., Case Western Reserve University, 2000, 97 pages; AAT 1399167
Preview (466 K) ***  Full Text - PDF (3 MB)  
**************************************************
355.
An analog VLSI motion sensor based on the fly visual system
by Harrison, Reid Randall, Ph.D., California Institute of Technology, 2000, 106 pages; AAT 9972604
Preview (772 K) ***  Full Text - PDF (4 MB)  
**************************************************
356.
A new functional decomposition method as applied to machine learning and VLSI layout
by Files, Craig Matthew, Ph.D., Portland State University, 2000, 235 pages; AAT 9999844
Preview (779 K) ***  Full Text - PDF (10 MB)  
**************************************************
357.
Approximation algorithms for VLSI routing
by Mandoiu, Ion I., Ph.D., Georgia Institute of Technology, 2000, 89 pages; AAT 9994432
Preview (633 K) ***  Full Text - PDF (3 MB)  
**************************************************
358.
A study of via electromigration in VLSI circuits
by Le, Huy Anh, Ph.D., The University of Texas at Arlington, 2000, 125 pages; AAT 9995946
Preview (442 K) ***  Full Text - PDF (5 MB)  
**************************************************
359.
Consolidated logic and layout synthesis for interconnect-centric VLSI design
by Salek, Amir H., Ph.D., University of Southern California, 2000, 124 pages; AAT 3018123
Preview (548 K) ***  Full Text - PDF (4 MB)  
**************************************************
360.
Crosstalk noise and timing analysis of digital VLSI circuits with coupled interconnects
by Lu, Ninglong, Ph.D., University of Illinois at Urbana-Champaign, 2000, 109 pages; AAT 9990067
Preview (626 K) ***  Full Text - PDF (4 MB)  
**************************************************
361.
Design and implementation of VLSI analog adaptive filters
by Diaz-Sanchez, Alesandro, Ph.D., New Mexico State University, 2000, 151 pages; AAT 9987142
Preview (556 K) ***  Full Text - PDF (4 MB)  
**************************************************
362.
Discovery: Distributed simulation of digital and analog VLSI systems
by Lungeanu, Dragos, Ph.D., The University of Iowa, 2000, 214 pages; AAT 9984739
Preview (496 K) ***  Full Text - PDF (6 MB)  
**************************************************
363.
Floorplanning algorithms for VLSI physical design automation
by Pang, Yingxin, Ph.D., University of California, San Diego, 2000, 77 pages; AAT 9970677
Preview (373 K) ***  Full Text - PDF (3 MB)  
**************************************************
364.
Image sequence segmentation using multiple features and edge fusion: Its algorithm and VLSI architecture
by Kim, Jinsang, Ph.D., Colorado State University, 2000, 195 pages; AAT 3002086
Preview (688 K) ***  Full Text - PDF (9 MB)  
**************************************************
365.
Input-pattern-independent estimation of peak current, peak power dissipation, and maximum voltage variation in the power distribution network of VLSI circuits
by Bobba, Sudhakar, Ph.D., University of Illinois at Urbana-Champaign, 2000, 186 pages; AAT 9989945
Preview (783 K) ***  Full Text - PDF (9 MB)  
**************************************************
366.
Integrated circuit design considerations for spacecraft VLSI implemented in standard CMOS processes
by Martin, Mark Noel, Ph.D., The Johns Hopkins University, 2000, 220 pages; AAT 9964157
Preview (757 K) ***  Full Text - PDF (8 MB)  
**************************************************
367.
In-the-loop training of a VLSI implementation of a smart sensor with low resolution programmable digital weights
by Yang, Jinming (Jim), Ph.D., University of Windsor (Canada), 2000, 217 pages; AAT NQ52447
Preview (487 K) ***  Full Text - PDF (7 MB)  
**************************************************
368.
Laser-induced vertical metallic link and implementations in VLSI
by Zhang, Wei, Ph.D., University of Maryland College Park, 2000, 178 pages; AAT 9967995
Preview (536 K) ***  Full Text - PDF (6 MB)  
**************************************************
369.
Locally-connected VLSI neural networks for invariant pattern recognition
by Thomas, Tyson James, Ph.D., University of Southern California, 2000, 147 pages; AAT 3041535
Preview (627 K) ***  Full Text - PDF (5 MB)  
**************************************************
370.
Microelectromechanical (MEMS) VLSI structures for hearing instruments
by Chowdhury, Sazzadur, M.A.Sc., University of Windsor (Canada), 2000, 158 pages; AAT MQ52529
Preview (458 K) ***  Full Text - PDF (5 MB)  
**************************************************
371.
Neuro-fuzzy controllers implemented in a microprocessor and in VLSI
by Binfet, Jeremy, M.S., University of Wyoming, 2000, 129 pages; AAT EP24326
Preview (635 K) ***  Full Text - PDF (4 MB)  
**************************************************
372.
New methodologies for low-power high-performance digital VLSI design
by Allam, Mohamed Walred, Ph.D., University of Waterloo (Canada), 2000, 207 pages; AAT NQ53483
Preview (472 K) ***  Full Text - PDF (6 MB)  
**************************************************
373.
On-line current monitoring of low-voltage VLSI circuits
by Pecuh, Ivan, M.Sc., University of Alberta (Canada), 2000, 91 pages; AAT MQ60163
Preview (598 K) ***  Full Text - PDF (3 MB)  
**************************************************
374.
Performance optimization methodologies for design of digital VLSI systems
by Vijay, Sundararajan, Ph.D., University of Minnesota, 2000, 204 pages; AAT 9972940
Preview (569 K) ***  Full Text - PDF (8 MB)  
**************************************************
375.
Performance driven VLSI system design for low energy wireless communications
by Hong, Sangjin, Ph.D., University of Michigan, 2000, 148 pages; AAT 9963806
Preview (725 K) ***  Full Text - PDF (6 MB)  
**************************************************
376.
Power reduction techniques for VLSI signal processing architectures
by Garrett, David Christopher, Ph.D., University of Virginia, 2000, 117 pages; AAT 9954980
Preview (668 K) ***  Full Text - PDF (5 MB)  
**************************************************
377.
Reconfigurable VLSI architecture and design for digit-serial DSP applications
by Lee, Hanho, Ph.D., University of Minnesota, 2000, 125 pages; AAT 9963012
Preview (581 K) ***  Full Text - PDF (5 MB)  
**************************************************
378.
Reduced order modeling and analysis for VLSI RLC interconnect
by Yang, Xiao-Dong, Ph.D., University of California, San Diego, 2000, 111 pages; AAT 9970674
Preview (553 K) ***  Full Text - PDF (4 MB)  
**************************************************
379.
Register-transfer level fault modeling and test evaluation technique for VLSI circuits
by Thaker, Pradipkumar Arunbhai, D.Sc., The George Washington University, 2000, 106 pages; AAT 9962101
Preview (681 K) ***  Full Text - PDF (4 MB)  
**************************************************
380.
Temperature-aware VLSI design and analysis
by Tsai, Ching-Han, Ph.D., University of Illinois at Urbana-Champaign, 2000, 125 pages; AAT 9990172
Preview (697 K) ***  Full Text - PDF (5 MB)  
**************************************************
381.
Test generation for crosstalk noise in VLSI circuits
by Chen, Wei-Yu, Ph.D., University of Southern California, 2000, 175 pages; AAT 3054857
Preview (662 K) ***  Full Text - PDF (6 MB)  
**************************************************
382.
The design, layout, and characterization of VLSI optoelectronic chips for free-space optical interconnects
by Rolston, David Robert Cameron, Ph.D., McGill University (Canada), 2000, 228 pages; AAT NQ69923
Preview (777 K) ***  Full Text - PDF (9 MB)  
**************************************************
383.
The effects of thermally-induced mechanical stress on 1/f noise in VLSI interconnections
by Klonaris, Nick Stathis, Ph.D., University of South Florida, 2000, 147 pages; AAT 3001956
Preview (441 K) ***  Full Text - PDF (4 MB)  
**************************************************
384.
Traffic-driven low-power design and modeling of VLSI satellite switching fabrics
by Wassal, Amr G., Ph.D., University of Waterloo (Canada), 2000, 180 pages; AAT NQ53523
Preview (481 K) ***  Full Text - PDF (6 MB)  
**************************************************
385.
VLSI architecture for a 16-bit Multiply-Accumulator (MAC) operating in multiplication time
by Chitari, Anant Yogeshwar, M.S., Texas A&M University - Kingsville, 2000, 91 pages; AAT 1399941
Preview (481 K) ***  Full Text - PDF (2 MB)  
**************************************************
386.
VLSI architecture of a fast binary adder with conditional carry generation
by Ambatipudi, Anuradha Venkata, M.S., Texas A&M University - Kingsville, 2000, 77 pages; AAT 1401364
Preview (353 K) ***  Full Text - PDF (2 MB)  
**************************************************
387.
VLSI arithmetic for media signal processing
by Farooqui, Aamir Alam, Ph.D., University of California, Davis, 2000, 178 pages; AAT 9969604
Preview (682 K) ***  Full Text - PDF (7 MB)  
**************************************************
388.
VLSI implementations of logarithm and anti-logarithm converters and their use in multiplication and division
by Abed, Khalid Hamdan, Ph.D., Wright State University, 2000, 248 pages; AAT 3074245
Preview (647 K) ***  Full Text - PDF (7 MB)  
**************************************************
389.
VLSI implementation of multidimensional discrete Fourier transform and discrete cosine transform
by Yu, Sungwook, Ph.D., The University of Texas at Austin, 2000, 126 pages; AAT 9983605
Preview (413 K) ***  Full Text - PDF (4 MB)  
**************************************************
390.
VLSI support for scheduling and buffer management in high-speed packet-switched networks
by Kazemi-Nia, Mehdi, Ph.D., The University of British Columbia (Canada), 2000, 151 pages; AAT NQ48662
Preview (591 K) ***  Full Text - PDF (6 MB)  
**************************************************
391.
VOILA: A VLSI mask format converter. (VLSI overall integrated layout application)
by Soni, Punit S., M.S., University of Wyoming, 2000, 128 pages; AAT EP25017
Preview (692 K) ***  Full Text - PDF (4 MB)  
**************************************************
392.
A CMOS DVD 4x Viterbi detector: System design and VLSI implementation
by Chalmers, Kenneth William Gordon, M.A.Sc., University of Toronto (Canada), 1999, 122 pages; AAT MQ45983
Preview (566 K) ***  Full Text - PDF (4 MB)  
**************************************************
393.
A critical gate-sizing algorithm for delay optimization in VLSI circuits
by Chen, Bin, Ph.D., Mississippi State University, 1999, 69 pages; AAT 9930328
Preview (434 K) ***  Full Text - PDF (3 MB)  
**************************************************
394.
Adaptive performance modeling of reconfigurable VLSI systems
by Walrath, Jeffrey Alan, Ph.D., University of Cincinnati, 1999, 274 pages; AAT 9960872
Preview (632 K) ***  Full Text - PDF (10 MB)  
**************************************************
395.
A fast and accurate technique for estimation of average power in digital CMOS VLSI circuits
by Murugavel, Ashok K., M.S., The University of Texas at El Paso, 1999, 75 pages; AAT EP05302
 Citation  Preview (376 K) ***  Full Text - PDF (2 MB)  
**************************************************
396.
Algorithms for the design of VLSI floorplans and logic modules
by Young, Fung Yu, Ph.D., The University of Texas at Austin, 1999, 132 pages; AAT 9956956
Preview (444 K) ***  Full Text - PDF (4 MB)  
**************************************************
397.
Algorithmic approach to design and optimization of VLSI interconnect
by Kay, Rony, Ph.D., Carnegie Mellon University, 1999, 160 pages; AAT 9950014
Preview (449 K) ***  Full Text - PDF (6 MB)  
**************************************************
398.
Analytic modeling of delay and power in submicron digital VLSI circuits
by Chen, Hung-Jung, Ph.D., State University of New York at Stony Brook, 1999, 146 pages; AAT 9958375
Preview (546 K) ***  Full Text - PDF (5 MB)  
**************************************************
399.
A parallel tabu search algorithm for VLSI standard cell placement
by Al-Yamani, Ahmad Abdul-Jabbar, M.S., King Fahd University of Petroleum and Minerals (Saudi Arabia), 1999, 84 pages; AAT 1395608
Preview (562 K) ***  Full Text - PDF (3 MB)  
**************************************************
400.
A placement methodology for low-power VLSI circuits
by Jimenez-Cedeno, Manuel A., Ph.D., Michigan State University, 1999, 164 pages; AAT 9948120
Preview (636 K) ***  Full Text - PDF (7 MB)  
**************************************************





نوشته شده در تاریخ جمعه 14 بهمن 1390 توسط مهندس باغی
درباره وبلاگ

آرشیو مطالب

آخرین مطالب

نویسندگان

موضوعات

پیوند ها

لینكستان

آمار سایت

Google

در این وبلاگ
در كل اینترنت /font>

Blog Skin