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پایان نامه و تز
پایان نامه و تز
.::فروش پایان نامه و تز لاتین::.

این مجموعه بیش از 800 پایان نامه و تز در مورد  VLSI  است .

این مجموعه آخرین پایان نامه های کار شده تا سال 2011 است.

برای خرید این مجموعه بصورت تکی یا کلی به قیمتی مناسب و گرفتن اطلاعات بیشتر با من تماس بگیرید.

در ادامه میتوانید عنوان پایان نامه ها و تزهای کار شده در زمینه

VLSI 

را مشاهده کنید.
101.
Design for manufacturing (DFM) in submicron VLSI design
by Cao, Ke, Ph.D., Texas A&M University, 2007, 89 pages; AAT 3281033
Preview (136 K) ***  Full Text - PDF (625 K)  
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102.
Efficient VLSI divide and conquer array architectures for multiplication
by Poonnen, Thomas, Ph.D., State University of New York at Buffalo, 2007, 155 pages; AAT 3277749
Preview (169 K) ***  Full Text - PDF (909 K)  
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103.
High-performance low-power VLSI design
by Zhu, Haikun, Ph.D., University of California, San Diego, 2007, 117 pages; AAT 3250072
Preview (193 K) ***  Full Text - PDF (3 MB)  
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104.
High-speed low-cost VLSI DSP algorithms based on novel fast convolutions and look-ahead pipelining structures
by Cheng, Chao, Ph.D., University of Minnesota, 2007, 181 pages; AAT 3268976
Preview (719 K) ***  Full Text - PDF (7 MB)  
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105.
HotSpot: A chip and package compact thermal modeling methodology for VLSI design
by Huang, Wei, Ph.D., University of Virginia, 2007, 139 pages; AAT 3239977
Preview (609 K) ***  Full Text - PDF (5 MB)  
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106.
Internet Protocol Television (IPTV) controller realization with Very Large Scale Integration (VLSI) modules
by Jayaram, Vivekananda, Ph.D., Florida International University, 2007, 164 pages; AAT 3298587
Preview (724 K) ***  Full Text - PDF (8 MB)  
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107.
Layout optimization algorithms for VLSI design and manufacturing
by Xu, Gang, Ph.D., The University of Texas at Austin, 2007, 110 pages; AAT 3277865
Preview (259 K) ***  Full Text - PDF (694 K)  
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108.
Low-complexity high-speed VLSI design of low-density parity-check decoders
by Cui, Zhiqiang, Ph.D., Oregon State University, 2007, 125 pages; AAT 3286035
Preview (380 K) ***  Full Text - PDF (1 MB)  
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109.
Low-voltage single-phase clocked Quasi-Adiabatic Pass-Gate logic family for low-power submicron VLSI CMOS applications
by Loo, Edward K. W., M.A.Sc., Simon Fraser University (Canada), 2007, 119 pages; AAT MR40738
Preview (591 K) ***  Full Text - PDF (4 MB)  
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110.
Minimizing and exploiting leakage in VLSI
by Jayakumar, Nikhil, Ph.D., Texas A&M University, 2007, 166 pages; AAT 3270350
Preview (148 K) ***  Full Text - PDF (2 MB)  
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111.
Mixed-signal VLSI robust time-frequency feature extraction
by Deng, Yunbin, Ph.D., The Johns Hopkins University, 2007, 118 pages; AAT 3240696
Preview (605 K) ***  Full Text - PDF (4 MB)  
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112.
Modeling and simulation of VLSI interconnects
by Jain, Jitesh, Ph.D., Purdue University, 2007, 147 pages; AAT 3307408
Preview (151 K) ***  Full Text - PDF (3 MB)  
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113.
MOSFET degradation due to negative bias temperature instability (NBTI) and hot carrier injection (HCI), and its implications for reliability-aware VLSI design
by Kufluoglu, Haldun, Ph.D., Purdue University, 2007, 200 pages; AAT 3307398
Preview (195 K) ***  Full Text - PDF (4 MB)  
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114.
Novel CAD techniques for new challenges in deep sub-micron VLSI design
by Cheng, Lei, Ph.D., University of Illinois at Urbana-Champaign, 2007, 147 pages; AAT 3290202
Preview (679 K) ***  Full Text - PDF (6 MB)  
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115.
Novel energy-efficient leakage current minimization techniques for CMOS VLSI circuits
by Lakshmikanthan, Preetham, Ph.D., Syracuse University, 2007, 123 pages; AAT 3295526
Preview (142 K) ***  Full Text - PDF (633 K)  
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116.
Performance analysis and VLSI design of a high-speed reconfigurable shared queue
by Wu, Ling, M.Eng., Memorial University of Newfoundland (Canada), 2007, 118 pages; AAT MR33455
Preview (440 K) ***  Full Text - PDF (4 MB)  
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117.
Physical aspects of VLSI design with a focus on three-dimensional integrated circuit applications
by Dilli, Zeynep, Ph.D., University of Maryland, College Park, 2007, 263 pages; AAT 3297333
Preview (256 K) ***  Full Text - PDF (11 MB)  
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118.
Power and thermal integrity analysis and optimization for nanometer VLSI systems
by Li, Hang, Ph.D., University of California, Riverside, 2007, 112 pages; AAT 3270442
Preview (811 K) ***  Full Text - PDF (4 MB)  
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119.
Power efficient design of SRAM arrays and optimal design of signal and power distribution networks in VLSI circuits
by Amelifard, Behnam, Ph.D., University of Southern California, 2007, 200 pages; AAT 3291876
Preview (80 K) ***  Full Text - PDF (1 MB)  
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120.
Process variation aware interconnect simulation and optimization in VLSI design
by Fan, Jeffrey, Ph.D., University of California, Riverside, 2007, 98 pages; AAT 3270427
Preview (684 K) ***  Full Text - PDF (4 MB)  
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121.
Segmental body composition determination through a bioelectrical very large scale integration (VLSI) system
by Montenegro, Jaime Marcelo, Ph.D., Florida International University, 2007, 141 pages; AAT 3279232
Preview (596 K) ***  Full Text - PDF (10 MB)  
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122.
Signal detection algorithm design and VLSI implementation for MIMO-OFDM wireless communication systems
by Chen, Sizhong, Ph.D., Rensselaer Polytechnic Institute, 2007, 82 pages; AAT 3272184
Preview (364 K) ***  Full Text - PDF (2 MB)  
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123.
Stochastic performance modeling and analysis of VLSI circuits in the presence of process variations
by Ghanta, Praveen, Ph.D., Arizona State University, 2007, 273 pages; AAT 3270578
Preview (505 K) ***  Full Text - PDF (9 MB)  
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124.
Thermal effects on VLSI circuits and microarchitecture
by Ku, Ja Chun, Ph.D., Northwestern University, 2007, 197 pages; AAT 3256037
Preview (107 K) ***  Full Text - PDF (2 MB)  
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125.
Timing analysis and optimization techniques for VLSI circuits
by Chen, Ruiming, Ph.D., Northwestern University, 2007, 197 pages; AAT 3284198
Preview (214 K) ***  Full Text - PDF (1 MB)  
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126.
Trellis detector/decoder VLSI architectures for data communication and storage systems
by Sun, Fei, Ph.D., Rensselaer Polytechnic Institute, 2007, 101 pages; AAT 3272221
Preview (250 K) ***  Full Text - PDF (864 K)  
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127.
Turbo codes: A VLSI implementation
by Israr, Moeed, M.A.Sc., Carleton University (Canada), 2007, 119 pages; AAT MR23340
Preview (572 K) ***  Full Text - PDF (4 MB)  
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128.
Ultralow power and process variation tolerant VLSI circuit design in nano-scale technologies
by Hwang, Myeong-Eun, Ph.D., Purdue University, 2007, 119 pages; AAT 3307518
Preview (331 K) ***  Full Text - PDF (1 MB)  
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129.
Variability-aware VLSI design automation for nanoscale technologies
by Khandelwal, Vishal, Ph.D., University of Maryland, College Park, 2007, 295 pages; AAT 3260494
Preview (176 K) ***  Full Text - PDF (1 MB)  
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130.
Variation and power issues in VLSI clock networks
by Venkataraman, Ganesh, Ph.D., Texas A&M University, 2007, 136 pages; AAT 3270407
Preview (102 K) ***  Full Text - PDF (699 K)  
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131.
VLSI architectures for LDPC encoder/decoder in WiMAX
by Kidambi Srinivasan, Venkata Krishnan, M.S., The University of Texas at Dallas, 2007, 101 pages; AAT 1448831
Preview (259 K) ***  Full Text - PDF (887 K)  
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132.
VLSI architecture for high-capacity wireless communications
by Kan, Wen-Chih, Ph.D., University of Minnesota, 2007, 127 pages; AAT 3285658
Preview (602 K) ***  Full Text - PDF (3 MB)  
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133.
VLSI architectures for turbo code decoders, LDPC code decoders and list sphere decoders
by Zhang, Yuping, Ph.D., University of Minnesota, 2007, 161 pages; AAT 3269037
Preview (663 K) ***  Full Text - PDF (7 MB)  
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134.
VLSI design of heart model
by Wang, Li, Ph.D., University of Maryland, College Park, 2007, 245 pages; AAT 3260327
Preview (235 K) ***  Full Text - PDF (41 MB)  
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135.
VLSI physical design for manufacturability and reliability
by Deng, Liang, Ph.D., University of Illinois at Urbana-Champaign, 2007, 122 pages; AAT 3290216
Preview (637 K) ***  Full Text - PDF (4 MB)  
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136.
VLSI testing and characterization system for micro electro-mechanical (MEM) sensors
by Yao, Junfang, Ph.D., Florida International University, 2007, 119 pages; AAT 3298602
Preview (684 K) ***  Full Text - PDF (6 MB)  
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137.
Accurate interconnect modeling for efficient transient simulation in VLSI chip design
by Xu, Qinwei, Ph.D., University of Michigan, 2006, 142 pages; AAT 3238120
Preview (831 K) ***  Full Text - PDF (5 MB)  
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138.
Advanced placement techniques for future VLSI circuits
by Goplen, Brent, Ph.D., University of Minnesota, 2006, 159 pages; AAT 3234915
Preview (896 K) ***  Full Text - PDF (11 MB)  
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139.
Algorithms and methodology in physical domain optimization for high-performance VLSI design
by Li, Wei, Ph.D., The University of Texas at Dallas, 2006, 118 pages; AAT 3238593
Preview (367 K) ***  Full Text - PDF (2 MB)  
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140.
Analog/RF VLSI layout generation: Layout retargeting via symbolic template
by Jangkrajarng, Nuttorn, Ph.D., University of Washington, 2006, 103 pages; AAT 3224239
Preview (654 K) ***  Full Text - PDF (4 MB)  
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141.
Analysis and optimization under crosstalk and variability in deep sub-micron VLSI circuits
by Sinha, Debjit, Ph.D., Northwestern University, 2006, 203 pages; AAT 3213030
Preview (144 K) ***  Full Text - PDF (2 MB)  
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142.
Analytical methods for VLSI module placement
by Wang, Qinke, Ph.D., University of California, San Diego, 2006, 155 pages; AAT 3211381
Preview (197 K) ***  Full Text - PDF (2 MB)  
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143.
A novel algorithm for improving the diagnosis resolution of VLSI circuits
by Vohra, Fazela Mansur, M.S.E.C.E., Southern Methodist University, 2006, 86 pages; AAT 1434830
Preview (57 K) ***  Full Text - PDF (234 K)  
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144.
A power/area optimal approach to VLSI signal processing
by Markovic, Dejan Marko, Ph.D., University of California, Berkeley, 2006, 183 pages; AAT 3228417
Preview (681 K) ***  Full Text - PDF (7 MB)  
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145.
A quasi-linear interpolation method to develop a direct digital frequency synthesizer with VLSI implementation
by Ashrafi, Ashkan, Ph.D., The University of Alabama in Huntsville, 2006, 98 pages; AAT 3209811
Preview (507 K) ***  Full Text - PDF (3 MB)  
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146.
Area and energy efficient VLSI architectures for low-density parity-check decoders using an on-the-fly computation
by Gunnam, Kiran Kumar, Ph.D., Texas A&M University, 2006, 141 pages; AAT 3296391
Preview (159 K) ***  Full Text - PDF (4 MB)  
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147.
Bat azimuthal echolocation using interaural level differences: Modeling and implementation by a VLSI-based hardware system
by Shi, Zhiping, Ph.D., University of Maryland, College Park, 2006, 201 pages; AAT 3222488
Preview (142 K) ***  Full Text - PDF (2 MB)  
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148.
Defect diagnosis of VLSI circuits
by Zou, Wei, Ph.D., The University of Iowa, 2006, 107 pages; AAT 3225696
Preview (630 K) ***  Full Text - PDF (5 MB)  
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149.
Design and analysis methodologies to reduce soft errors in nanometer VLSI circuits
by Gill, Balkaran Singh, Ph.D., Case Western Reserve University, 2006, 164 pages; AAT 3193528
Preview (350 K) ***  Full Text - PDF (3 MB)  
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150.
Designing robust and low-leakage VLSI circuits at the end of silicon roadmap: Technology and circuit perspectives
by Mukhopadhyay, Saibal, Ph.D., Purdue University, 2006, 428 pages; AAT 3239783
Preview (224 K) ***  Full Text - PDF (7 MB)  
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151.
Efficient VLSI architectures for matrix inversion with application to MIMO systems
by Honnavara Prasad, Sushma, M.S.E.E., The University of Texas at Dallas, 2006, 89 pages; AAT 1439346
Preview (95 K) ***  Full Text - PDF (471 K)  
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152.
Efficient VLSI architectures for error control coders
by Kim, Sang-Min, Ph.D., University of Minnesota, 2006, 120 pages; AAT 3234925
Preview (541 K) ***  Full Text - PDF (4 MB)  
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153.
Efficient VLSI architectures for image and video signal processing algorithms
by Lee, Jooheung, Ph.D., The Pennsylvania State University, 2006, 139 pages; AAT 3229017
Preview (716 K) ***  Full Text - PDF (5 MB)  
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154.
Geometric partitioning for parallelizing post-placement VLSI design processes
by Kim, Jiyoun, Ph.D., University of Michigan, 2006, 114 pages; AAT 3237997
Preview (866 K) ***  Full Text - PDF (6 MB)  
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155.
Improved VLSI architecture for attitude determination computations
by Arrigo, Jeanette Fay Freauf, Ph.D., University of California, San Diego, 2006, 195 pages; AAT 3195257
Preview (234 K) ***  Full Text - PDF (2 MB)  
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156.
Incremental placement for modern VLSI design closure
by Ren, Haoxing, Ph.D., The University of Texas at Austin, 2006, 146 pages; AAT 3245324
Preview (247 K) ***  Full Text - PDF (1 MB)  
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157.
Interconnect planning in physical design of VLSI
by Sham, Chiu Wing, Ph.D., The Chinese University of Hong Kong (Hong Kong), 2006, 115 pages; AAT 3240995
Preview (724 K) ***  Full Text - PDF (6 MB)  
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158.
Layout optimization in ultra deep submicron VLSI design
by Wu, Di, Ph.D., Texas A&M University, 2006, 117 pages; AAT 3219195
Preview (196 K) ***  Full Text - PDF (601 K)  
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159.
Liquid gallium contact RF MEMS switch and VLSI MEMS switch
by Liu, Qingquan, Ph.D., University of California, Davis, 2006, 172 pages; AAT 3250825
Preview (1 MB) ***  Full Text - PDF (17 MB)  
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160.
Low-power VLSI design under multiple sources of uncertainty
by Rao, Rajeev Raghavendra, Ph.D., University of Michigan, 2006, 167 pages; AAT 3238065
Preview (693 K) ***  Full Text - PDF (8 MB)  
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161.
Low-power visual pattern classification in analog VLSI
by Bridges, Seth, Ph.D., University of Washington, 2006, 87 pages; AAT 3241880
Preview (438 K) ***  Full Text - PDF (4 MB)  
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162.
Mixed-signal VLSI adiabatic array computing
by Karakiewicz, Rafal, M.A.Sc., University of Toronto (Canada), 2006, 71 pages; AAT MR21132
Preview (429 K) ***  Full Text - PDF (3 MB)  
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163.
Mixed-signal micropower VLSI systems for biomedical array signal processing
by Stanacevic, Milutin, Ph.D., The Johns Hopkins University, 2006, 120 pages; AAT 3197232
Preview (664 K) ***  Full Text - PDF (5 MB)  
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164.
Modeling the nonlinear active cochlea: Mathematics and analog VLSI
by Wen, Bo, Ph.D., University of Pennsylvania, 2006, 197 pages; AAT 3225564
Preview (439 K) ***  Full Text - PDF (7 MB)  
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165.
Multilevel optimization for VLSI circuit placement
by Sze, Nang Keung, Ph.D., University of California, Los Angeles, 2006, 105 pages; AAT 3249414
Preview (416 K) ***  Full Text - PDF (4 MB)  
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166.
New techniques for addressing challenges of VLSI structural testing
by Lin, Yung-Chieh, Ph.D., University of California, Santa Barbara, 2006, 147 pages; AAT 3208718
Preview (570 K) ***  Full Text - PDF (5 MB)  
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167.
Optimization schemes for variability-driven VLSI design automation
by Davoodi, Azadeh, Ph.D., University of Maryland, College Park, 2006, 135 pages; AAT 3222320
Preview (143 K) ***  Full Text - PDF (913 K)  
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168.
Optimizations of manufacturability and manufacturing in nanometer-era VLSI
by Xu, Xu, Ph.D., University of California, San Diego, 2006, 147 pages; AAT 3219776
Preview (507 K) ***  Full Text - PDF (1 MB)  
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169.
Parallel Voronoi diagrams for VLSI design
by Taylor, Ryan, M.C.S., Carleton University (Canada), 2006, 121 pages; AAT MR13460
Preview (565 K) ***  Full Text - PDF (4 MB)  
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170.
Piecewise linear delay modeling of digital VLSI circuits
by Chang, Jian, Ph.D., Oklahoma State University, 2006, 154 pages; AAT 3211653
Preview (139 K) ***  Full Text - PDF (1 MB)  
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171.
Placement of VLSI circuits
by Li, Chen, Ph.D., Purdue University, 2006, 116 pages; AAT 3232111
Preview (147 K) ***  Full Text - PDF (841 K)  
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172.
Process-variation-resistant dynamic power optimization for VLSI circuits
by Hu, Fei, Ph.D., Auburn University, 2006, 197 pages; AAT 3201580
Preview (207 K) ***  Full Text - PDF (960 K)  
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173.
Static timing analysis in VLSI design
by Zhou, Shuo, Ph.D., University of California, San Diego, 2006, 127 pages; AAT 3207913
Preview (350 K) ***  Full Text - PDF (4 MB)  
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174.
Stochastic and hybrid linear equation solvers and their applications in VLSI design automation
by Qian, Haifeng, Ph.D., University of Minnesota, 2006, 156 pages; AAT 3220028
Preview (595 K) ***  Full Text - PDF (6 MB)  
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175.
Test generation for capacitance and inductance induced noise on interconnects in VLSI logic
by Sinha, Arani, Ph.D., University of Southern California, 2006, 179 pages; AAT 3257774
Preview (138 K) ***  Full Text - PDF (2 MB)  
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176.
Thermal conduction phenomena in VLSI circuits and systems
by Im, Sungjun, Ph.D., Stanford University, 2006, 133 pages; AAT 3219296
Preview (884 K) ***  Full Text - PDF (7 MB)  
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177.
Three-dimensional interconnect modeling for nano-scale VLSI technologies
by Jiang, Rong, Ph.D., The University of Wisconsin - Madison, 2006, 133 pages; AAT 3222928
Preview (487 K) ***  Full Text - PDF (5 MB)  
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178.
Variation-aware computer-aided design techniques for VLSI digital circuits
by Bindra, Jaskirat Singh, Ph.D., University of Minnesota, 2006, 188 pages; AAT 3234904
Preview (566 K) ***  Full Text - PDF (8 MB)  
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179.
VLSI architectures of LDPC based signal detection and coding system for magnetic recording channel
by Zhong, Hao, Ph.D., Rensselaer Polytechnic Institute, 2006, 84 pages; AAT 3232635
Preview (587 K) ***  Full Text - PDF (4 MB)  
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180.
VLSI architecture and FPGA prototyping of a secure digital camera for biometric application
by Adamo, Oluwayomi Bamidele, M.S., University of North Texas, 2006, 62 pages; AAT 1437030
Preview (72 K) ***  Full Text - PDF (524 K) 
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181.
VLSI design and implementation of a high performance H.264 CABAC encoder
by Shojania, Hassan, M.Sc.(Eng), Queen's University at Kingston (Canada), 2006, 191 pages; AAT MR15320
Preview (655 K) ***  Full Text - PDF (9 MB)  
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182.
VLSI implementation of a Montgomery modular multiplier
by Wang, Xin, M.A.Sc., Carleton University (Canada), 2006, 100 pages; AAT MR18334
Preview (606 K) ***  Full Text - PDF (4 MB)  
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183.
VLSI implementation of biologically inspired vision system for depth perception
by Karri, Sirisha, Ph.D., State University of New York at Buffalo, 2006, 140 pages; AAT 3226681
Preview (181 K) ***  Full Text - PDF (1 MB)  
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184.
VLSI implementation of low-error-floor multi-rate capacity-approaching low-density parity-check code decoder
by Yang, Lei, Ph.D., University of Washington, 2006, 115 pages; AAT 3207820
Preview (503 K) ***  Full Text - PDF (4 MB)  
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185.
Adaptive signal processing and correlational learning in mixed-signal VLSI
by Figueroa Toro, Miguel E., Ph.D., University of Washington, 2005, 138 pages; AAT 3183445
Preview (634 K) ***  Full Text - PDF (6 MB)  
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186.
Advanced timing and synchronization methodologies for digital VLSI integrated circuits
by Taskin, Baris, Ph.D., University of Pittsburgh, 2005, 76 pages; AAT 3193014
Preview (164 K) ***  Full Text - PDF (445 K)  
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187.
Algorithms for the scaling toward nanometer VLSI physical synthesis
by Sze, Chin Ngai, Ph.D., Texas A&M University, 2005, 156 pages; AAT 3246529
Preview (103 K) ***  Full Text - PDF (965 K)  
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188.
Algorithms, architectures, and circuits for VLSI-based CDMA communications
by Andreev, Boris, Ph.D., The University of Rochester, 2005, 216 pages; AAT 3156812
Preview (703 K) ***  Full Text - PDF (7 MB)  
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189.
Automatic design planning and exploration of VLSI systems
by Romesis, Michail, Ph.D., University of California, Los Angeles, 2005, 159 pages; AAT 3218673
Preview (491 K) ***  Full Text - PDF (7 MB)  
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190.
A VLSI analog computer/math co-processor for a digital computer
by Cowan, Glenn Edward Russell, Ph.D., Columbia University, 2005, 211 pages; AAT 3174769
Preview (655 K) ***  Full Text - PDF (7 MB)  
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191.
Binary operation procedure for thinning process and its VLSI implementation in a pixel array circuit
by Wu, Kuo-Ting, M.A.Sc., Concordia University (Canada), 2005, 69 pages; AAT MR13247
Preview (361 K) ***  Full Text - PDF (2 MB)  
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192.
Deep submicron CMOS VLSI circuit reliability modeling, simulation and design
by Li, Xiaojun, Ph.D., University of Maryland, College Park, 2005, 211 pages; AAT 3201972
Preview (186 K) ***  Full Text - PDF (2 MB)  
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193.
Encoding techniques for energy-efficient and reliable communication in VLSI circuits
by Aghaghiri, Yazdan, Ph.D., University of Southern California, 2005, 249 pages; AAT 3180384
Preview (545 K) ***  Full Text - PDF (9 MB)  
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194.
Exploring spatial locality in VLSI on-chip power grids
by Chan, Tsz Shuen (Kay), M.A.Sc., University of Toronto (Canada), 2005, 79 pages; AAT MR07250
Preview (552 K) ***  Full Text - PDF (4 MB)  
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195.
Fault modeling, delay evaluation and path selection for delay test under process variation in nano-scale VLSI circuits
by Lu, Xiang, Ph.D., Texas A&M University, 2005, 119 pages; AAT 3202336
Preview (203 K) ***  Full Text - PDF (823 K)  
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196.
High-speed VLSI architectures for error-correcting codes and cryptosystems
by Zhang, Xinmiao, Ph.D., University of Minnesota, 2005, 156 pages; AAT 3172871
Preview (839 K) ***  Full Text - PDF (7 MB)  
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197.
Iterative decoding in analog VLSI
by Hemati, Saied, Ph.D., Carleton University (Canada), 2005, 193 pages; AAT NR08332
Preview (723 K) ***  Full Text - PDF (7 MB)  
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198.
Low-noise and high-frequency clock generation core for VLSI CMOS integration
by Robinson, Moises Emanuel, Ph.D., The University of Texas at Austin, 2005, 139 pages; AAT 3217150
Preview (321 K) ***  Full Text - PDF (1 MB)  
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199.
Low power and high performance VLSI circuits for clocking systems
by Zhao, Peiyi, Ph.D., University of Louisiana at Lafayette, 2005, 101 pages; AAT 3167960
Preview (513 K) ***  Full Text - PDF (4 MB)  
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200.
Novel design techniques to reduce simultaneous switching noise in VLSI packaging
by LaMeres, Brock J., Ph.D., University of Colorado at Boulder, 2005, 194 pages; AAT 3190356
Preview (887 K) ***  Full Text - PDF (9 MB)  
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